Mogi I/O : OTT/Podcast/Short Video Apps for you
Chief Architect – Coherent DSP & Optical ASIC Design
Mogi I/O : OTT/Podcast/Short Video Apps for you, Austin, Texas, us, 78716
Chief Architect – Coherent DSP & Optical ASIC Design
Position: Chief Architect – Coherent DSP & Optical ASIC Design (Austin, TX)
Type: Full‑time, Onsite (Austin, Texas). 5+ years experience. H1B/EAD likely sponsorship. Direct hire for core team in well‑funded startup.
Job Overview The role focuses on mixed‑signal verification for advanced DSP‑based communication and AI interconnect chips. You’ll develop behavioral models for analog blocks, run mixed‑signal dynamic verification, and collaborate with world‑class analog and digital design teams to validate next‑gen coherent DSP solutions.
Key Responsibilities
Perform behavioral modeling (BM) of analog designs to enable digital verification.
Conduct mixed‑signal dynamic verification (without AMS) using chip‑level digital design tools.
Write, simulate, and debug Verilog/SystemVerilog code for verification.
Use Cadence Virtuoso Schematics to interface with analog designs.
Develop test plans, verification strategies, and scalable testbench automation.
Collaborate with DSP, analog, and digital engineering teams to validate high‑speed designs.
Present verification results, maintain coverage metrics, and ensure first‑pass success in silicon.
Minimum Qualifications
5+ years of mixed‑signal verification experience.
Strong background in behavioral modeling for analog‑to‑digital verification.
Hands‑on Verilog/SystemVerilog verification coding.
Familiarity with Virtuoso Schematics.
Basic understanding of analog design fundamentals.
Preferred Qualifications
Experience with UVM (Universal Verification Methodology).
Background working with Synopsys and Cadence verification tools.
Understanding of advanced verification infrastructure – simulators, waveform viewers, coverage, execution automation.
Proven track record building portable/scalable test environments.
Strong communication skills; ability to write test plans, document results, present to multi‑functional teams.
Company: Series‑D semiconductor innovator specializing in programmable coherent DSP solutions powering cloud and AI infrastructure. Backed by $180 MM investment from venture firms, the company is scaling rapidly to support AI‑driven connectivity.
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Type: Full‑time, Onsite (Austin, Texas). 5+ years experience. H1B/EAD likely sponsorship. Direct hire for core team in well‑funded startup.
Job Overview The role focuses on mixed‑signal verification for advanced DSP‑based communication and AI interconnect chips. You’ll develop behavioral models for analog blocks, run mixed‑signal dynamic verification, and collaborate with world‑class analog and digital design teams to validate next‑gen coherent DSP solutions.
Key Responsibilities
Perform behavioral modeling (BM) of analog designs to enable digital verification.
Conduct mixed‑signal dynamic verification (without AMS) using chip‑level digital design tools.
Write, simulate, and debug Verilog/SystemVerilog code for verification.
Use Cadence Virtuoso Schematics to interface with analog designs.
Develop test plans, verification strategies, and scalable testbench automation.
Collaborate with DSP, analog, and digital engineering teams to validate high‑speed designs.
Present verification results, maintain coverage metrics, and ensure first‑pass success in silicon.
Minimum Qualifications
5+ years of mixed‑signal verification experience.
Strong background in behavioral modeling for analog‑to‑digital verification.
Hands‑on Verilog/SystemVerilog verification coding.
Familiarity with Virtuoso Schematics.
Basic understanding of analog design fundamentals.
Preferred Qualifications
Experience with UVM (Universal Verification Methodology).
Background working with Synopsys and Cadence verification tools.
Understanding of advanced verification infrastructure – simulators, waveform viewers, coverage, execution automation.
Proven track record building portable/scalable test environments.
Strong communication skills; ability to write test plans, document results, present to multi‑functional teams.
Company: Series‑D semiconductor innovator specializing in programmable coherent DSP solutions powering cloud and AI infrastructure. Backed by $180 MM investment from venture firms, the company is scaling rapidly to support AI‑driven connectivity.
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