Amazon
SOC Design - STA, Hardware Compute Group
Job ID: 3111830 | Amazon.com Services LLC The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. Key Job Responsibilities
Includes definition and development of signoff methodology and corresponding implementation solution Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC/SoCs. Full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC. Streamlining the timing signoff criteria, timing analysis methodologies and flows. Analyze and incorporate advanced timing signoff flows (AOCV, POCV Based STA, IR Drop aware STA) into SoC timing signoff flow. Work for Systems and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis, Place & Route and other local/remote teams to address the design challenges in the context of timing sign‑off. Concepts of CRPR, clock paths analysis and tweaks to meet timing. Multi-Corner and Multimode analysis. Close timing at signoff corners covering the entire modes, delay corners for cells and interconnects. Basic Qualifications
Bachelor's degree in Electrical Engineering or a related field Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing Preferred Qualifications
Master's degree in Electrical or Communications Engineering or a related field Experience with formal verification techniques including abstraction and end‑to‑end checking Experience with ARM and various DSP ISAs Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards Experience with industry standard tools and scripting languages (Python or Perl) for automation Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
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Job ID: 3111830 | Amazon.com Services LLC The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge. Work hard. Have fun. Make history. Key Job Responsibilities
Includes definition and development of signoff methodology and corresponding implementation solution Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC/SoCs. Full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC. Streamlining the timing signoff criteria, timing analysis methodologies and flows. Analyze and incorporate advanced timing signoff flows (AOCV, POCV Based STA, IR Drop aware STA) into SoC timing signoff flow. Work for Systems and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis, Place & Route and other local/remote teams to address the design challenges in the context of timing sign‑off. Concepts of CRPR, clock paths analysis and tweaks to meet timing. Multi-Corner and Multimode analysis. Close timing at signoff corners covering the entire modes, delay corners for cells and interconnects. Basic Qualifications
Bachelor's degree in Electrical Engineering or a related field Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing Preferred Qualifications
Master's degree in Electrical or Communications Engineering or a related field Experience with formal verification techniques including abstraction and end‑to‑end checking Experience with ARM and various DSP ISAs Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards Experience with industry standard tools and scripting languages (Python or Perl) for automation Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.
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