Diverse Lynx Llc
Job Title
FPGA RTL design and Board validation
Location:
Santa Clara, CA (Onsite)
Job Type- Fulltime
Note-
Email:
Job Description:
We are seeking a highly skilled Senior FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and development, and FPGA validation and testing. The ideal candidate will have a strong background in design debugging and a deep familiarity with Quartus tools. This role requires a detail oriented individual who can effectively contribute to software development projects while ensuring high quality deliverables.
Key Responsibilities
Design and develop RTL for FPGA applications, ensuring adherence to project specifications and timelines.
Conduct thorough design debugging to identify and resolve issues in the design process.
Perform FPGA validation and testing to ensure functionality and performance meet required standards.
Utilize Quartus tools for design synthesis, simulation, and implementation.
Collaborate with cross functional teams to integrate IP designs into larger systems.
Qualifications
7 yr to 15 yr in FPGA RTL design, Verification and board level Validation
Should have worked in SV- UVM, Verilog, VHDL
Protocol knowledge: AXI, PCIe, Ethernet
Design and debug using Quartus tool is a must
Should have done board debug in Lab. Should have working experience in using lab equipments like LA, CRO
Regards
Rahul Srivastava
IT Technical Recruiter
Diverse Lynx LLC.
#J-18808-Ljbffr
FPGA RTL design and Board validation
Location:
Santa Clara, CA (Onsite)
Job Type- Fulltime
Note-
Email:
Job Description:
We are seeking a highly skilled Senior FPGA Design Engineer with 7 to 15 years of experience in RTL design, IP design and development, and FPGA validation and testing. The ideal candidate will have a strong background in design debugging and a deep familiarity with Quartus tools. This role requires a detail oriented individual who can effectively contribute to software development projects while ensuring high quality deliverables.
Key Responsibilities
Design and develop RTL for FPGA applications, ensuring adherence to project specifications and timelines.
Conduct thorough design debugging to identify and resolve issues in the design process.
Perform FPGA validation and testing to ensure functionality and performance meet required standards.
Utilize Quartus tools for design synthesis, simulation, and implementation.
Collaborate with cross functional teams to integrate IP designs into larger systems.
Qualifications
7 yr to 15 yr in FPGA RTL design, Verification and board level Validation
Should have worked in SV- UVM, Verilog, VHDL
Protocol knowledge: AXI, PCIe, Ethernet
Design and debug using Quartus tool is a must
Should have done board debug in Lab. Should have working experience in using lab equipments like LA, CRO
Regards
Rahul Srivastava
IT Technical Recruiter
Diverse Lynx LLC.
#J-18808-Ljbffr