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Rival

PCB Designer - Full Time

Rival, Santa Clara, California, us, 95053

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We are looking for an experienced full-time PCB designer who can help us do PCB design planning and feasibility study, PCB/package co-design, component placement and routing, PCB design and methodology development.

Responsibilities:

PCB technology and material selection

Stackup definition, power planning, high-speed signal route study with SIPI engineers

Footprint and library build up

Critical component ballmap optimization with package designers

Feasibility study

Component placement

Power constraints

HSIO constraint manager file generation

Impedance calculation

DFM/DFA

PCB design methodology development

PCB vendor interaction

Requirements:

Knowledge and experience of high power, high speed, high layer count PCB design

Advanced PCB material and technology knowledge

Expert with Cadence Allegro PCB and APD tool chain

Willing to and proactively engage with system EE, SIPI, thermal/mechanical engineer, and package designers on early design exploration and solution path finding

Basic SIPI knowledge

Basic thermal/mechanical knowledge

CPU/SOC/Microcontroller overall knowledge

Excellent communication skills

Great team player

Highly motivated and self driven

Education and Experience:

Bachelor’s degree or technical training in PCB design

CPU server, networking board design experience preferred

Minimum 7 years related experience

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