Lead ASIC IP Designer – High‑Performance SoC Architect

A leading semiconductor company in Sunnyvale, California, is seeking a Principal ASIC Digital Design Engineer with over 15 years of experience in architecting complex RTL-based IP cores. You will lead RTL design, collaborate with verification teams, and engage in innovative digital design methodologies. The ideal candidate has a Bachelor's or Master's degree in Electrical/Electronics Engineering and a passion for solving intricate design challenges. Attractive benefits and comprehensive health offerings included. #J-18808-Ljbffr