Senior FPGA/VLSI RTL Designer — Onsite Austin, Equity

A semiconductor innovator is seeking an experienced VLSI RTL Designer in Austin, Texas. The role involves designing high-performance communication systems for AI infrastructure, requiring strong RTL proficiency and collaborative skills. Candidates must have a minimum of 5 years of experience in ASIC/VLSI digital design, with expertise in Verilog or SystemVerilog. This full-time position offers competitive compensation and equity participation. #J-18808-Ljbffr