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Cadence Design Systems

Lead Analog IC Designer — SerDes & High-Speed I/O

Cadence Design Systems, San Jose, California, United States, 95199

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A leading technology company is seeking a Principal Analog IC Designer with at least 7 years of experience in CMOS SerDes or high-speed I/O IC design. The role involves designing analog/mixed signal IC circuit blocks and final verification against customer specifications. Candidates should possess a master's or PhD in Electrical Engineering, with proficiency in CAD tools and a solid understanding of analog circuit design. The position offers a competitive salary range from $136,500 to $253,500, along with comprehensive benefits. #J-18808-Ljbffr