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Capgemini

SOC Design Verification Lead / Manager

Capgemini, Santa Clara, California, us, 95053

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About the Role Join our Center of Excellence as a

SOC Solution Engineer , where you will

architect, design, and deliver innovative System-on-Chip (SoC) solutions

that address complex client challenges. This role blends

technical mastery with consultative engagement , enabling you to

shape strategies, influence decisions, and build scalable solutions

that drive business outcomes.

What You’ll Do

Architect and Implement Solutions

Design and deploy end-to-end SoC verification environments leveraging UVM, UPF, and advanced methodologies. Engineer tailored solutions that align with client objectives and industry best practices.

Consult and Strategize

Partner with clients and internal stakeholders to analyze requirements, define risk-mitigated strategies, and recommend innovative approaches (including AI-driven enhancements) for SoC verification and design.

Lead and Inspire

Mentor global engineering teams, orchestrate cross-functional collaboration, and drive excellence in solution delivery. Establish best practices and champion continuous improvement.

Develop and Optimize

Construct robust test environments, formulate verification plans, and streamline workflows using automation and scripting (Python, TCL, Shell). Ensure coverage closure and quality metrics are met.

Engage and Influence

Present technical roadmaps, deliver compelling demos, and communicate insights through clear documentation and executive-level presentations.

Key Responsibilities

Build

scalable verification frameworks for complex SoCs with processors, memories, and high-speed interfaces.

Consult

with sales and product teams to shape proposals and position solutions that differentiate our offerings.

Strategize

verification lifecycles from planning to sign-off, ensuring alignment with client goals.

Innovate

by introducing GenAI and advanced automation to enhance productivity and efficiency.

Collaborate

across design, architecture, and firmware teams to resolve issues and accelerate delivery.

Your Profile

15+ years

in SoC design/verification with expertise in UVM, UPF, and protocol VIPs.

Proficiency in

SystemVerilog ,

VHDL , and scripting languages (Python, TCL).

Strong grasp of

functional coverage , simulation, emulation, and formal verification.

Proven ability to lead teams, influence stakeholders, and deliver strategic solutions.

Master’s degree in Electrical Engineering, Computer Science, or related field.

Why Join Us?

Impact : Shape next-generation SoC solutions for global clients.

Innovation : Work with cutting-edge technologies and AI-driven methodologies.

Collaboration : Be part of a high-performing team in a dynamic, growth-focused environment.

Life at Capgemini

Healthcare including dental, vision, mental health, and well-being programs

Financial well-being programs such as 401(k) and Employee Share Ownership Plan

Paid time off and paid holidays

Paid parental leave

Family building benefits like adoption assistance, surrogacy, and cryopreservation

Social well-being benefits like subsidized back-up child/elder care and tutoring

Mentoring, coaching and learning programs

Employee Resource Groups

Disaster Relief

Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

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