Senior DFT Design Architect for SoC/ASIC

A leading design automation company in Austin, Texas is seeking a SoC/ASIC Digital Design Engineer with expertise in Design for Test (DFT) and Automatic Test Pattern Generation (ATPG). The role requires 5-15 years of experience, knowledge of scan technologies, and strong problem-solving skills. The ideal candidate exhibits discipline and can thrive in a fast-paced project environment, collaborating with cross-functional teams. #J-18808-Ljbffr