Senior Analog/Mixed-Signal Layout Designer for 5nm/3nm ICs

A leading semiconductor company based in San Jose is seeking an experienced Analog Mixed-Signal Layout Engineer. The role requires expertise in mixed-signal and analog RF IC physical design, especially for high-speed applications in advanced CMOS FinFET technologies. The successful candidate will be involved in developing and leading IC layouts, collaborating across teams, and must excel in communication and scheduling. The position offers a competitive salary range of $120,000 - $192,000 and a comprehensive benefits package.
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