The University of Texas at Austin
Radio Frequency (RF) Architect, Texas Institute for Electronics
The University of Texas at Austin, Austin, Texas, us, 78716
Title : Radio Frequency (RF) Architect, Texas Institute for Electronics
Location : Austin, TX
About TIE : Texas Institute for Electronics (TIE) is a transformative, well‑funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative. TIE is a leading effort to advance 3D heterogeneous integration (3DHI), chiplet‑based architectures, and multi‑component microsystems, catalyzing breakthroughs across microelectronics, artificial intelligence, quantum computing, high‑performance computing, and next‑generation healthcare devices. Backed by $1.4 billion in combined funding from DARPA, Texas state initiatives, and strategic partners, TIE builds foundational capabilities in advanced packaging and integrated design infrastructure to restore U.S. leadership in microelectronics manufacturing. TIE’s 3DHI and chiplet integration platforms deliver novel thermal management and advanced interconnect solutions, delivering unprecedented performance and energy efficiency.
Purpose : This role will develop advanced RF and mixed‑signal microsystems for high‑performance communication, radar, and sensing applications. The architect will define RF front‑end architectures, lead EM/circuit co‑simulation, oversee RF testing, and collaborate with partners to define design enablement requirements for next‑generation RF packaging.
Responsibilities
Architect RF and mixed‑signal microsystems operating across K‑band (18–27 GHz), Ka‑band (27–40 GHz), and W‑band (75–110 GHz) for high‑performance, low‑latency communication, radar, and sensing applications.
Define and drive RF front‑end architectures, including LNAs, PAs, mixers, phase shifters, and T/R modules, optimized for 3.0D integration and advanced packaging flows.
Collaborate with device, packaging, and digital architects to achieve co‑optimization of RF, thermal, and mechanical performance within heterogeneous multi‑die systems.
Lead EM/circuit co‑simulation and system‑level modeling using tools such as HFSS, ADS, AWR, or CST to validate and tune design performance across process corners and temperature.
Oversee RF testing, characterization, and calibration at wafer, die, and module levels—developing test plans, de‑embedding strategies, and measurement automation for K/W‑band hardware.
Engage with foundry, EDA, and metrology partners to define design enablement requirements for next‑generation RF packaging (e.g., hybrid bonding, AiP, glass/Si interposers).
Author technical documentation, reference designs, and design guidelines to accelerate ecosystem adoption of TIE’s 3.0D RF microsystems platform.
Other related functions as assigned.
Required Qualifications
M.S. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
At least 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Deep expertise in S‑parameter characterization, on‑wafer measurements, vector network analysis, and de‑embedding methodologies.
Proficiency with RF simulation and design tools such as Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio, or equivalent.
Strong understanding of electromagnetic effects in packaging—signal integrity, coupling, and loss across interposers and redistribution layers.
Proven track record in RF testing automation, data analysis, and test correlation between EM models and measured results.
Ability to work cross‑functionally with device, packaging, EDA, and system teams in a fast‑moving R&D environment.
Location: Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible with travel up to 30–50%.
Relevant education and experience may be substituted as appropriate.
Preferred Qualifications
Ph.D. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
More than 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Experience developing Antenna‑in‑Package (AiP), RFIC/SiP, or 3D‑stacked RF front‑end modules for advanced communications or sensing.
Familiarity with 3DHI design flows and RF/mixed‑signal co‑simulation using advanced EDA environments (Cadence, Synopsys, Siemens, Ansys).
Hands‑on experience with wafer‑level probing, cryogenic testing, or thermal‑vacuum characterization for high‑frequency systems.
Knowledge of GaAs, GaN, SiGe, or CMOS RF processes, and packaging constraints for high‑frequency operation.
Publication or patent record in millimeter‑wave circuits, antennas, or RF packaging.
Strong technical writing and presentation skills for industry and defense‑sector collaborations.
Salary Range TIE pays industry‑competitive salaries.
Working Conditions
May work around chemical fumes.
May work in standard office conditions.
May work around electrical and mechanical hazards.
Repetitive use of a keyboard at a workstation.
Use of manual dexterity (e.g., using a mouse).
Work Shift
Monday – Friday, 8 am to 5 pm, or flexible between 7 am and 6 pm.
Hybrid work arrangements may be possible, with travel up to 30–50% as needed.
Required Materials
Resume/CV.
3 work references with contact information; at least one reference should be from a supervisor.
Letter of interest (optional).
Equal Opportunity Employer The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
Pay Transparency The University of Texas at Austin will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the contractor’s legal duty to furnish information.
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Location : Austin, TX
About TIE : Texas Institute for Electronics (TIE) is a transformative, well‑funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative. TIE is a leading effort to advance 3D heterogeneous integration (3DHI), chiplet‑based architectures, and multi‑component microsystems, catalyzing breakthroughs across microelectronics, artificial intelligence, quantum computing, high‑performance computing, and next‑generation healthcare devices. Backed by $1.4 billion in combined funding from DARPA, Texas state initiatives, and strategic partners, TIE builds foundational capabilities in advanced packaging and integrated design infrastructure to restore U.S. leadership in microelectronics manufacturing. TIE’s 3DHI and chiplet integration platforms deliver novel thermal management and advanced interconnect solutions, delivering unprecedented performance and energy efficiency.
Purpose : This role will develop advanced RF and mixed‑signal microsystems for high‑performance communication, radar, and sensing applications. The architect will define RF front‑end architectures, lead EM/circuit co‑simulation, oversee RF testing, and collaborate with partners to define design enablement requirements for next‑generation RF packaging.
Responsibilities
Architect RF and mixed‑signal microsystems operating across K‑band (18–27 GHz), Ka‑band (27–40 GHz), and W‑band (75–110 GHz) for high‑performance, low‑latency communication, radar, and sensing applications.
Define and drive RF front‑end architectures, including LNAs, PAs, mixers, phase shifters, and T/R modules, optimized for 3.0D integration and advanced packaging flows.
Collaborate with device, packaging, and digital architects to achieve co‑optimization of RF, thermal, and mechanical performance within heterogeneous multi‑die systems.
Lead EM/circuit co‑simulation and system‑level modeling using tools such as HFSS, ADS, AWR, or CST to validate and tune design performance across process corners and temperature.
Oversee RF testing, characterization, and calibration at wafer, die, and module levels—developing test plans, de‑embedding strategies, and measurement automation for K/W‑band hardware.
Engage with foundry, EDA, and metrology partners to define design enablement requirements for next‑generation RF packaging (e.g., hybrid bonding, AiP, glass/Si interposers).
Author technical documentation, reference designs, and design guidelines to accelerate ecosystem adoption of TIE’s 3.0D RF microsystems platform.
Other related functions as assigned.
Required Qualifications
M.S. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
At least 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Deep expertise in S‑parameter characterization, on‑wafer measurements, vector network analysis, and de‑embedding methodologies.
Proficiency with RF simulation and design tools such as Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio, or equivalent.
Strong understanding of electromagnetic effects in packaging—signal integrity, coupling, and loss across interposers and redistribution layers.
Proven track record in RF testing automation, data analysis, and test correlation between EM models and measured results.
Ability to work cross‑functionally with device, packaging, EDA, and system teams in a fast‑moving R&D environment.
Location: Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible with travel up to 30–50%.
Relevant education and experience may be substituted as appropriate.
Preferred Qualifications
Ph.D. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
More than 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Experience developing Antenna‑in‑Package (AiP), RFIC/SiP, or 3D‑stacked RF front‑end modules for advanced communications or sensing.
Familiarity with 3DHI design flows and RF/mixed‑signal co‑simulation using advanced EDA environments (Cadence, Synopsys, Siemens, Ansys).
Hands‑on experience with wafer‑level probing, cryogenic testing, or thermal‑vacuum characterization for high‑frequency systems.
Knowledge of GaAs, GaN, SiGe, or CMOS RF processes, and packaging constraints for high‑frequency operation.
Publication or patent record in millimeter‑wave circuits, antennas, or RF packaging.
Strong technical writing and presentation skills for industry and defense‑sector collaborations.
Salary Range TIE pays industry‑competitive salaries.
Working Conditions
May work around chemical fumes.
May work in standard office conditions.
May work around electrical and mechanical hazards.
Repetitive use of a keyboard at a workstation.
Use of manual dexterity (e.g., using a mouse).
Work Shift
Monday – Friday, 8 am to 5 pm, or flexible between 7 am and 6 pm.
Hybrid work arrangements may be possible, with travel up to 30–50% as needed.
Required Materials
Resume/CV.
3 work references with contact information; at least one reference should be from a supervisor.
Letter of interest (optional).
Equal Opportunity Employer The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
Pay Transparency The University of Texas at Austin will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the contractor’s legal duty to furnish information.
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