3D/2.5D IC Layout Engineer – Power & Interconnects

A leading technology firm in San Jose is seeking a Physical Design Engineer to work on advanced ASIC products. Responsibilities include the design layout implementation of power grids and interconnects, alongside DRC and electrical checks. The ideal candidate has strong scripting skills and extensive experience in electrical engineering. This role offers a competitive salary range of $120,000 - $192,000 with a comprehensive benefits package including 401(K) matching.
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