Hybrid SerDes Micro Architect for High-Speed IPs

A leading technology company in San Jose is seeking a talented SerDes Micro Architect to drive the definition of next-generation high-speed SerDes IPs. Ideal candidates will have expertise in high-speed RTL design, collaboration across teams, and strong problem-solving skills. Successful applicants will leverage their academic credentials and practical experience to define architecture requirements and support product performance. The role offers a hybrid working model and a chance to be part of a world-class team driving innovation in computing.
#J-18808-Ljbffr