Senior SIPI Architect for 224G+ SerDes Interconnects

A leading technology company in San Francisco seeks an experienced SIPI Architect to define and own the signal and power integrity strategy for high-speed SerDes. Candidates should have 20+ years of relevant experience in electrical engineering, demonstrating deep expertise in SerDes technologies. The role requires leading analysis across cross-functional teams. Competitive compensation between $257,400 and $386,300 is offered, along with significant benefits including stock options and education reimbursement. #J-18808-Ljbffr