A leading technology company in Austin, Texas, is seeking an experienced Analog Layout Engineer to shape the next generation of systems-on-chip (SOCs). The ideal candidate will have over 10 years of experience in analog layout design, particularly in FinFET technologies, and possess strong skills in tools like Cadence Virtuoso. You will collaborate with cross-functional teams, delivering sophisticated layouts while leveraging advanced design verification tools. This role promotes innovation and offers opportunities for career growth in a dynamic environment.
#J-18808-Ljbffr