Overview
The role will consist of 80% heads-down design/layout work and 20% meetings. The focus is on analog layout rather than custom digital. The Layout Engineer will join the team to support cutting-edge analog layout in advanced CMOS technologies (FinFET and gate-all-around, 2-3nm). The ideal candidate will have hands-on experience in advanced CMOS technologies and a strong background in physical layout, verification, and optimization of analog blocks.
Job Title Layout Engineer
Location Redmond, WA - Remote
Pay Range $54.83 - $60.33 (Benefits, 401k and PTO) on Experis W2
Top 3 Hard Skills Required + Years of Experience
Analog circuit layout in advanced CMOS (FinFET/gate-all-around, 2-3nm) – Minimum 4 years.
Proficiency with layout tools (Cadence Virtuoso, Calibre) – Minimum 4 years.
Understanding of analog layout techniques (matching, shielding, reliability, parasitic optimization) – Minimum 4 years.
What’s the Job? We are seeking a highly skilled and motivated Layout Engineer to support the development of high-performance analog and mixed-signal integrated circuits. The ideal candidate will have hands-on experience in advanced CMOS technologies, and a strong background in physical layout, verification, and optimization of analog blocks.
Key Responsibilities
Execute full-custom layout for analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, comparators, and temperature sensors.
Collaborate with circuit designers to optimize layout for performance, area, and power.
Perform floorplanning, block-level routing, and macro-level assembly.
Conduct physical verification using tools like Cadence Virtuoso, Synopsys Custom Compiler, and Calibre.
Address DRC/LVS, EMIR, and DFM issues and ensure layout meets manufacturing and reliability standards.
Support tape-out activities and post-layout simulation reviews.
Document layout strategies and contribute to design reviews.
What’s Needed?
Analog circuit layout in advanced CMOS (FinFET/gate-all-around, 2-3nm)
Proficiency with layout tools (Cadence Virtuoso, Calibre)
Understanding of analog layout techniques (matching, shielding, reliability, parasitic optimization)
Benefits
Medical and Prescription Drug Plans
Dental Plan
Vision Plan
Health Savings Account
Health Flexible Spending Account
Dependent Care Flexible Spending Account
Supplemental Life Insurance
Short Term and Long Term Disability Insurance
Business Travel Insurance
401(k), Plus Match
Weekly Pay
If this role interests you, click apply now and a recruiter will be in touch to discuss this opportunity. We look forward to speaking with you!
About ManpowerGroup ManpowerGroup, parent company of Manpower, Experis, Talent Solutions, and Jefferson Wells, is a leading global workforce solutions company. We help organizations transform in a fast-changing world of work by sourcing, assessing, developing, and managing talent. Our brands create substantial value for candidates and clients across more than 75 countries and territories and have done so for over 70 years. We are recognized for our diversity and inclusion efforts, and in 2022 ManpowerGroup was named one of the World7s Most Ethical Companies for the 13th year.
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Job Title Layout Engineer
Location Redmond, WA - Remote
Pay Range $54.83 - $60.33 (Benefits, 401k and PTO) on Experis W2
Top 3 Hard Skills Required + Years of Experience
Analog circuit layout in advanced CMOS (FinFET/gate-all-around, 2-3nm) – Minimum 4 years.
Proficiency with layout tools (Cadence Virtuoso, Calibre) – Minimum 4 years.
Understanding of analog layout techniques (matching, shielding, reliability, parasitic optimization) – Minimum 4 years.
What’s the Job? We are seeking a highly skilled and motivated Layout Engineer to support the development of high-performance analog and mixed-signal integrated circuits. The ideal candidate will have hands-on experience in advanced CMOS technologies, and a strong background in physical layout, verification, and optimization of analog blocks.
Key Responsibilities
Execute full-custom layout for analog and mixed-signal blocks including ADCs, DACs, PLLs, LDOs, comparators, and temperature sensors.
Collaborate with circuit designers to optimize layout for performance, area, and power.
Perform floorplanning, block-level routing, and macro-level assembly.
Conduct physical verification using tools like Cadence Virtuoso, Synopsys Custom Compiler, and Calibre.
Address DRC/LVS, EMIR, and DFM issues and ensure layout meets manufacturing and reliability standards.
Support tape-out activities and post-layout simulation reviews.
Document layout strategies and contribute to design reviews.
What’s Needed?
Analog circuit layout in advanced CMOS (FinFET/gate-all-around, 2-3nm)
Proficiency with layout tools (Cadence Virtuoso, Calibre)
Understanding of analog layout techniques (matching, shielding, reliability, parasitic optimization)
Benefits
Medical and Prescription Drug Plans
Dental Plan
Vision Plan
Health Savings Account
Health Flexible Spending Account
Dependent Care Flexible Spending Account
Supplemental Life Insurance
Short Term and Long Term Disability Insurance
Business Travel Insurance
401(k), Plus Match
Weekly Pay
If this role interests you, click apply now and a recruiter will be in touch to discuss this opportunity. We look forward to speaking with you!
About ManpowerGroup ManpowerGroup, parent company of Manpower, Experis, Talent Solutions, and Jefferson Wells, is a leading global workforce solutions company. We help organizations transform in a fast-changing world of work by sourcing, assessing, developing, and managing talent. Our brands create substantial value for candidates and clients across more than 75 countries and territories and have done so for over 70 years. We are recognized for our diversity and inclusion efforts, and in 2022 ManpowerGroup was named one of the World7s Most Ethical Companies for the 13th year.
#J-18808-Ljbffr