Lead SERDES Micro Architect for High-Speed Analog IP

A leading tech company in Beaverton seeks a SERDES Micro Architect to define Micro Architecture for next-gen analog mixed-signal IPs. This role involves leading design verification, reviewing firmware, and ensuring performance requirements are met. Ideal candidates will have a BS degree, with at least 10 years of experience in SERDES design, proficient in DSP concepts and mixed-signal modeling. Join a diverse team dedicated to innovation and inclusion. #J-18808-Ljbffr