
SerDes Digital Design Lead - High-Speed IP Architect
Eliyan, San Francisco, California, United States, 94199
A leading chiplet startup is seeking a SerDes Digital Design Lead to drive architecture and implementation of high-speed serial link IPs targeting 224G and 448G data rates. You will work on digital logic for cutting-edge interconnect products within a collaborative, innovative environment. The ideal candidate has over 12 years of experience in digital design, a Master's or Ph.D. in Electrical Engineering, and strong RTL design skills. This role offers a great work environment and excellent benefits.
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