Ncore CAE Director
Arteris, Austin, TX, United States
Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system‑on‑chips (SoCs) that fuel modern innovation. If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!
Key Responsibilities
Lead a team of Corporate Application Engineering team in Supporting the Sales, FAE, R&D and Customers
Lead a team of Corporate Application Engineers to support Ncore and CodaCache Products
Represent the Field teams (Sales and FAE) and Participate in PCT (Product Core Team) to define product direction and support.
Work with Arteris engineering team and the CTO office to be the go‑to architect for our Field AE organization.
Negotiate the requirements with customers to facilitate Arteris products adoption in some of the leading chips being designed today.
Become familiar with Arteris customers and prospects designs, understand the problems they are facing, and provide guidance to the CTO office and Engineering team to ensure the developments will fit best the market and its needs.
Work with an expert team to support and deploy interconnect and memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, AI and consumer SoC designs.
Use your strong background in System design, SoC architecture and RTL, and your enthusiasm for technology, you will take part in presales activities to convince potential customers of the technical benefits of our technology.
Take part of post sales and support some of the most interesting and advanced customers in the semiconductor industry.
Produce Application Notes, White Papers, Tradeshow Presentations.
Create and deliver training to educate our Field FAE organization.
Experience Requirements / Qualifications
You have more than 15 years of relevant front‑end digital ASIC design experience, from RTL to synthesis
Minimum 5 years experience in managing FAE/CAE teams in presales OR postsales
Minimum 5 years of relevant experience in complex System‑on‑Chip architecture
In‑depth understanding of multi‑CPU subsystems architecture, cache coherency and memory hierarchies
Understanding of SoC system level architectures
Understanding of CPU integration, bus fabrics, DDR
Understanding of Multi‑processor and Multi‑cluster coherent architectures
Familiarity with the ARM ecosystem: CPU, GPU, etc.
Good experience with RTL synthesis, DC, DC‑topo, RTLA, Fusion Compiler
You are customer focused and enjoy working with them to help them find solutions
You have experience in a customer facing role and/or working with a sales team
You are highly motivated, excellent problem solver and results‑driven
You have good presentation and organizational skills
Motivated to train and educate others and help them solve complex problems
You are a team player who can take initiatives
This position requires being able to travel up to 25% both domestically and internationally.
Qualities
You are passionate about your job;
You are an excellent problem solver;
You are a solid communicator;
You are results driven; and,
You have empathy for the complex problems being served by our customers.
Education Requirements
BS/MS in Electrical Engineering or equivalent
Estimated Base Salary
$180,000 to $210,000 annually. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
About Arteris Arteris is a leading provider of system IP for the acceleration of system‑on‑chip (SoC) development across today’s electronic systems. Arteris network‑on‑chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. With over 300 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.
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Key Responsibilities
Lead a team of Corporate Application Engineering team in Supporting the Sales, FAE, R&D and Customers
Lead a team of Corporate Application Engineers to support Ncore and CodaCache Products
Represent the Field teams (Sales and FAE) and Participate in PCT (Product Core Team) to define product direction and support.
Work with Arteris engineering team and the CTO office to be the go‑to architect for our Field AE organization.
Negotiate the requirements with customers to facilitate Arteris products adoption in some of the leading chips being designed today.
Become familiar with Arteris customers and prospects designs, understand the problems they are facing, and provide guidance to the CTO office and Engineering team to ensure the developments will fit best the market and its needs.
Work with an expert team to support and deploy interconnect and memory hierarchy solutions for some of the world’s most sophisticated mobile, telecom, automotive, AI and consumer SoC designs.
Use your strong background in System design, SoC architecture and RTL, and your enthusiasm for technology, you will take part in presales activities to convince potential customers of the technical benefits of our technology.
Take part of post sales and support some of the most interesting and advanced customers in the semiconductor industry.
Produce Application Notes, White Papers, Tradeshow Presentations.
Create and deliver training to educate our Field FAE organization.
Experience Requirements / Qualifications
You have more than 15 years of relevant front‑end digital ASIC design experience, from RTL to synthesis
Minimum 5 years experience in managing FAE/CAE teams in presales OR postsales
Minimum 5 years of relevant experience in complex System‑on‑Chip architecture
In‑depth understanding of multi‑CPU subsystems architecture, cache coherency and memory hierarchies
Understanding of SoC system level architectures
Understanding of CPU integration, bus fabrics, DDR
Understanding of Multi‑processor and Multi‑cluster coherent architectures
Familiarity with the ARM ecosystem: CPU, GPU, etc.
Good experience with RTL synthesis, DC, DC‑topo, RTLA, Fusion Compiler
You are customer focused and enjoy working with them to help them find solutions
You have experience in a customer facing role and/or working with a sales team
You are highly motivated, excellent problem solver and results‑driven
You have good presentation and organizational skills
Motivated to train and educate others and help them solve complex problems
You are a team player who can take initiatives
This position requires being able to travel up to 25% both domestically and internationally.
Qualities
You are passionate about your job;
You are an excellent problem solver;
You are a solid communicator;
You are results driven; and,
You have empathy for the complex problems being served by our customers.
Education Requirements
BS/MS in Electrical Engineering or equivalent
Estimated Base Salary
$180,000 to $210,000 annually. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
About Arteris Arteris is a leading provider of system IP for the acceleration of system‑on‑chip (SoC) development across today’s electronic systems. Arteris network‑on‑chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. With over 300 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease. Learn more at arteris.com.
#J-18808-Ljbffr