Principal Engineer, Mixed-Signal Design Engineering

Lead architect for clock generation and distribution in an advanced mixed-signal IC for pin electronic testing. PLL design, integration and debug. Multi-G - Hz clock distribution. Multi-chip synchronization. Phase interpolators. Circuits for measuring and correcting timing errors. Assist in architecture development of a receive path which include subblock specifications which may include CTLE, PGA and A/ D converter. Qualifications:PhD required .-10 years of experience in analog design and design integration. Analog/ RF Designer experienced in CMOS IC design with multiple tapeouts. Good understanding of. Analog/ RF circuits, and systems. Communication theory with a particular emphasis on equalization of a wired link. MOS device modeling and operation. Signal integrity. Ser. Des. Extensive experience in PCB design, troubleshooting and RF measurements. Preferred Skills:Tapeouts in Fin. FET technology. Strong problem-solving abilities and attention to detail. Ability to work collaborative...Engineer, Design Engineer, Principal, Design, Manufacturing