CPU Power Management and Debug Microarchitecture & Logic Design - Full Time

CPU Power Management and Debug Microarchitecture & Logic Design - Full Time

Join to apply for the CPU Power Management and Debug Microarchitecture & Logic Design - Full Time role at Rivos Inc.

Responsibilities

1. Develop microarchitecture specifications for power management and debug features
2. Own RTL development of power management and debug features
3. Collaborate with verification, physical implementation, DFT, and firmware teams to deliver a design meeting functional, performance, and power requirements
4. Work with external IP vendors to evaluate and integrate IP into the design
5. Apply domain knowledge to propose and evaluate new features

Requirements

1. Knowledge of modern OoO CPU microarchitectures
2. 2+ years of relevant industry experience in CPU power management
3. Understanding of synchronous and asynchronous reset flows
4. Experience with active and idle power management techniques
5. Proficiency in SystemVerilog
6. Knowledge of coherent memory and bus protocols (AMBA, APB, SPI, I2C, etc.) is a plus
7. Knowledge of RISC-V ISA is a plus

Education

Bachelors, Masters, or PhD in EE or ECE

Seniority Level

Entry level

Employment Type

Full-time

Job Function

Other

Industries

Computer Hardware Manufacturing

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