The University of Texas at Austin
Radio Frequency (RF) Architect
The University of Texas at Austin, Campus, Illinois, us, 60920
Job Posting Title
Radio Frequency (RF) Architect
Hiring Department Texas Institute for Electronics
Location AUSTIN, TX
Job Details Texas Institute for Electronics (TIE) is a transformative, well‑funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative.
Our mission is to advance the state of the art in 3D heterogeneous integration, chiplet‑based architectures, and multi‑component microsystems to catalyze breakthroughs across microelectronics, AI, quantum computing, HPC, and next‑generation healthcare devices.
Backed by \$1.4 billion in funding, we are building foundational capabilities to restore U.S. leadership in microelectronics manufacturing.
Benefits
Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas with 8.25% employer matching
Additional Voluntary Retirement Programs: Tax‑Sheltered Annuity 403(b) and Deferred Compensation 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access and professional conference opportunities
Tuition assistance
Expansive employee discount program
Free access to UT Austin libraries, museums, and shuttle services
Purpose This role will develop advanced RF and mixed‑signal microsystems for high‑performance communication, radar, and sensing applications. It includes defining RF front‑end architectures, leading EM/circuit co‑simulation, overseeing RF testing, and collaborating with partners on design enablement for next‑generation RF packaging.
Responsibilities
Architect RF and mixed‑signal microsystems in the K‑band (18–27 GHz), Ka‑band (27–40 GHz), and W‑band (75–110 GHz) for low‑latency communication, radar, and sensing.
Define and drive RF front‑end architectures—LNAs, PAs, mixers, phase shifters, T/R modules—optimized for 3.0D integration and advanced packaging.
Collaborate with device, packaging, and digital architects to co‑optimize RF, thermal, and mechanical performance in heterogeneous multi‑die systems.
Lead EM/circuit co‑simulation and system‑level modelling with HFSS, ADS, AWR, or CST to validate and tune design performance across process corners and temperature.
Oversee RF testing, characterization, and calibration at wafer, die, and module levels, developing test plans and automation for K/W‑band hardware.
Engage with foundry, EDA, and metrology partners to define design enablement requirements for next‑generation RF packaging.
Author technical documentation, reference designs, and design guidelines to accelerate ecosystem adoption of TIE’s 3.0D RF microsystems platform.
Perform additional related functions as assigned.
Required Qualifications
M.S. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
At least 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Deep expertise in S‑parameter characterization, on‑wafer measurements, vector‑network analysis, and de‑embedding methodologies.
Proficiency with RF simulation and design tools such as Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio, or equivalent.
Strong understanding of electromagnetic effects in packaging—signal integrity, coupling, and loss across interposers and redistribution layers.
Proven track record in RF testing automation, data analysis, and correlation between EM models and measured results.
Ability to work cross‑functionally with device, packaging, EDA, and system teams in a fast‑moving R&D environment.
Location: Austin, TX preferred for close collaboration. Hybrid work arrangements may be possible with travel up to 30–50%.
Relevant education and experience may be substituted as appropriate.
Preferred Qualifications
Ph.D. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
More than 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Experience developing antenna‑in‑package, RF IC/SiP, or 3D‑stacked front‑end modules for advanced communications or sensing.
Familiarity with 3DHI design flows and RF/mixed‑signal co‑simulation using advanced EDA environments (Cadence, Synopsys, Siemens, Ansys).
Hands‑on experience with wafer‑level probing, cryogenic testing, or thermal‑vacuum characterization for high‑frequency systems.
Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and packaging constraints for high‑frequency operation.
Publication or patent record in millimeter‑wave circuits, antennas, or RF packaging.
Strong technical writing and presentation skills for industry and defense‑sector collaborations.
Salary Range TIE pays industry‑competitive salaries.
Working Conditions
May work around chemical fumes and standard office conditions.
May work around electrical and mechanical hazards.
Repetitive use of a keyboard at a workstation.
Use of manual dexterity (e.g., using a mouse).
Work Shift
Monday‑Friday, 8 am to 5 pm, or flexible between 7 am and 6 pm.
Hybrid work arrangements possible, with travel up to 30–50% as needed.
Required Materials
Resume/CV
Three work references with contact information (at least one supervisor reference)
Letter of interest (optional)
Equal Opportunity Employer Attention: The University of Texas at Austin is an equal opportunity/affirmative action employer. We comply with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs, and activities, and admissions.
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Hiring Department Texas Institute for Electronics
Location AUSTIN, TX
Job Details Texas Institute for Electronics (TIE) is a transformative, well‑funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative.
Our mission is to advance the state of the art in 3D heterogeneous integration, chiplet‑based architectures, and multi‑component microsystems to catalyze breakthroughs across microelectronics, AI, quantum computing, HPC, and next‑generation healthcare devices.
Backed by \$1.4 billion in funding, we are building foundational capabilities to restore U.S. leadership in microelectronics manufacturing.
Benefits
Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas with 8.25% employer matching
Additional Voluntary Retirement Programs: Tax‑Sheltered Annuity 403(b) and Deferred Compensation 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access and professional conference opportunities
Tuition assistance
Expansive employee discount program
Free access to UT Austin libraries, museums, and shuttle services
Purpose This role will develop advanced RF and mixed‑signal microsystems for high‑performance communication, radar, and sensing applications. It includes defining RF front‑end architectures, leading EM/circuit co‑simulation, overseeing RF testing, and collaborating with partners on design enablement for next‑generation RF packaging.
Responsibilities
Architect RF and mixed‑signal microsystems in the K‑band (18–27 GHz), Ka‑band (27–40 GHz), and W‑band (75–110 GHz) for low‑latency communication, radar, and sensing.
Define and drive RF front‑end architectures—LNAs, PAs, mixers, phase shifters, T/R modules—optimized for 3.0D integration and advanced packaging.
Collaborate with device, packaging, and digital architects to co‑optimize RF, thermal, and mechanical performance in heterogeneous multi‑die systems.
Lead EM/circuit co‑simulation and system‑level modelling with HFSS, ADS, AWR, or CST to validate and tune design performance across process corners and temperature.
Oversee RF testing, characterization, and calibration at wafer, die, and module levels, developing test plans and automation for K/W‑band hardware.
Engage with foundry, EDA, and metrology partners to define design enablement requirements for next‑generation RF packaging.
Author technical documentation, reference designs, and design guidelines to accelerate ecosystem adoption of TIE’s 3.0D RF microsystems platform.
Perform additional related functions as assigned.
Required Qualifications
M.S. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
At least 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Deep expertise in S‑parameter characterization, on‑wafer measurements, vector‑network analysis, and de‑embedding methodologies.
Proficiency with RF simulation and design tools such as Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio, or equivalent.
Strong understanding of electromagnetic effects in packaging—signal integrity, coupling, and loss across interposers and redistribution layers.
Proven track record in RF testing automation, data analysis, and correlation between EM models and measured results.
Ability to work cross‑functionally with device, packaging, EDA, and system teams in a fast‑moving R&D environment.
Location: Austin, TX preferred for close collaboration. Hybrid work arrangements may be possible with travel up to 30–50%.
Relevant education and experience may be substituted as appropriate.
Preferred Qualifications
Ph.D. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter‑wave design.
More than 8 years of hands‑on experience designing, simulating, and testing RF/microwave ICs or modules (K‑band and above).
Experience developing antenna‑in‑package, RF IC/SiP, or 3D‑stacked front‑end modules for advanced communications or sensing.
Familiarity with 3DHI design flows and RF/mixed‑signal co‑simulation using advanced EDA environments (Cadence, Synopsys, Siemens, Ansys).
Hands‑on experience with wafer‑level probing, cryogenic testing, or thermal‑vacuum characterization for high‑frequency systems.
Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and packaging constraints for high‑frequency operation.
Publication or patent record in millimeter‑wave circuits, antennas, or RF packaging.
Strong technical writing and presentation skills for industry and defense‑sector collaborations.
Salary Range TIE pays industry‑competitive salaries.
Working Conditions
May work around chemical fumes and standard office conditions.
May work around electrical and mechanical hazards.
Repetitive use of a keyboard at a workstation.
Use of manual dexterity (e.g., using a mouse).
Work Shift
Monday‑Friday, 8 am to 5 pm, or flexible between 7 am and 6 pm.
Hybrid work arrangements possible, with travel up to 30–50% as needed.
Required Materials
Resume/CV
Three work references with contact information (at least one supervisor reference)
Letter of interest (optional)
Equal Opportunity Employer Attention: The University of Texas at Austin is an equal opportunity/affirmative action employer. We comply with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs, and activities, and admissions.
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