Senior Digital IC Design Engineer – High-Speed SerDes & AV

A global semiconductor company is seeking a System Engineer in Santa Clara, CA. The successful candidate will focus on designing high-speed mixed-signal SerDes circuits and digital circuit interfacing. Candidates should possess a BSEE and 12 years or an MSEE and 10 years of relevant experience, outstanding problem-solving skills, and expertise in RTL coding. The role offers a competitive salary range of $172,000 to $268,500 annually. With a focus on collaboration and communication within a talented team, it’s an exciting opportunity for innovative individuals. #J-18808-Ljbffr