Job Description
Analog layout designer providing onsite support for advanced nodes, working with global layout and design team.
Responsibilities
Work independently on block-level and IP-level analog layout design, coordinating with circuit designers and layout team.
Design floorplan and layout for analog modules such as SerDes, ADC/DAC, PLL, etc.
Integrate top-level design.
Apply deep sub-micron analog layout concepts; preferred candidates have FinFET experience.
Understand and address ESD, latch-up, EM, and debug DRC, LVS, antenna errors.
Address complex issues requiring in-depth analysis; exercise judgment in selecting methods, techniques, and evaluation criteria.
Lead or coordinate activities of other personnel (team lead).
Use Cadence tools and be familiar with TSMC processes.
Qualifications
Minimum 8+ years of hands‑on experience in analog or RF layout.
Proven experience with floorplan and layout for analog modules like SerDes, ADC/DAC, PLL, etc.
Strong skills debugging DRC, LVS, and antenna errors.
Good understanding of analog layout concepts for deep sub‑micron processes; FinFET experience preferred.
Knowledge of fabrication processes and experience with Cadence tools and TSMC processes.
Experience Bachelor's degree and 8+ years of related experience required.
Compensation and Benefits The annual base salary range for this position is $108,000 - $172,800. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents and equity pursuant to equity plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: medical, dental and vision plans, 401(k) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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Responsibilities
Work independently on block-level and IP-level analog layout design, coordinating with circuit designers and layout team.
Design floorplan and layout for analog modules such as SerDes, ADC/DAC, PLL, etc.
Integrate top-level design.
Apply deep sub-micron analog layout concepts; preferred candidates have FinFET experience.
Understand and address ESD, latch-up, EM, and debug DRC, LVS, antenna errors.
Address complex issues requiring in-depth analysis; exercise judgment in selecting methods, techniques, and evaluation criteria.
Lead or coordinate activities of other personnel (team lead).
Use Cadence tools and be familiar with TSMC processes.
Qualifications
Minimum 8+ years of hands‑on experience in analog or RF layout.
Proven experience with floorplan and layout for analog modules like SerDes, ADC/DAC, PLL, etc.
Strong skills debugging DRC, LVS, and antenna errors.
Good understanding of analog layout concepts for deep sub‑micron processes; FinFET experience preferred.
Knowledge of fabrication processes and experience with Cadence tools and TSMC processes.
Experience Bachelor's degree and 8+ years of related experience required.
Compensation and Benefits The annual base salary range for this position is $108,000 - $172,800. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents and equity pursuant to equity plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: medical, dental and vision plans, 401(k) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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