US_West | Electrical / Electronics & Semiconductors Engineer_L3
TALENT Software Services, Santa Clara, CA, United States
Overview
US_West | Electrical / Electronics & Semiconductors Engineer_L3
Responsibilities
- Own physical design implementation of digital blocks in AMS design - both at block level and full chip, using existing PD flows
- Tasks include:
- synthesis
- PNR
- STA
- EM/IR analysis
- LEC
- Low Power Checks
- Exploration of early floorplan, powerplan, congestion and routing analysis, go hierarchical synthesis
- Optimize PPA to meet power/performance requirements
- Elaborate and Compile/Place RTL to provide PPA feedback on early RTL
- Review Timing / Area / congestion / Power reports
Minimum Qualifications
- Bachelor’s degree in Electrical Engineering or equivalent
- 7+ years experience in physical design
- Good understanding of Physical Design Concepts
- Understanding of RTL2GDS Physical Design flow, understanding of design, floorplan & placement of Digital/Analog components at full chip level
- Experience with TSMC/GF foundry processes - from 55nm to 22nm
- Experience with low power implementation, power gating, multiple voltage rails, UPF knowledge
- Experience in using Cadence Innovus for block and chip level implementation
- Experience working with EDA tools Primetime, Formality or Conformal for LEC and low power checks
- Good understanding of Verilog languages, Scripting languages (Tcl/Python preferred)
Optional / Additional Information
- Details commonly provided: First Name, Middle name, and Last Name; City and State; Open to Relocate; Rate; Availability; Phone #; Mobile #; Email address; Visa type; Visa Expiration Date; Hiring Status
- Seniority level: Mid-Senior level
- Employment type: Full-time
- Job function: Other
- Industries: IT Services and IT Consulting
Location notes: Sunnyvale, CA and related postings with salary ranges.
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