
Senior High-Speed PCB Layout Engineer for Real-Time Radar
Array Labs, Palo Alto, CA, United States
A pioneering technology firm in Palo Alto is seeking a Senior High-Speed PCB Layout Engineer. You will own the physical design of high-speed digital and mixed-signal electronics in Altium, ensuring signal and power integrity. Responsibilities include PCB layout from component placement to manufacturing release and collaboration with cross-functional teams to optimize designs. This role offers a competitive salary between $125,000 and $160,000 along with generous equity options and a supportive work environment.
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