Chiplet Verification Lead & Strategy Architect

A leading semiconductor firm is seeking a qualified candidate to lead a chiplet verification team in Hillsboro, Oregon. The ideal candidate will have at least 6 years of experience in ASIC/FPGA design verification and strong knowledge of SystemVerilog/UVM. Responsibilities include managing a team, defining verification strategies, and collaborating across teams. This role offers a hybrid work model and a competitive compensation package ranging from $256,050 to $361,480 annually. #J-18808-Ljbffr