Mask Layout Designer - Rochester, MN
IBM Computing, Rochester, MN, United States
Introduction
At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high‑resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You’ll work with diverse technologies and colleagues worldwide to deliver resilient, future‑ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress.
Your role and responsibilities A Mask Layout Designer specializes in the layout of analog circuits, focusing on the arrangement of components within 14nm integrated circuits (ICs). Their role is critical in ensuring that the design functions correctly and meets performance specifications. Responsibilities include owning the circuit layout and collaborating with manufacturing, testing, and various engineering disciplines. The job requires a resourceful problem solver who can overcome technical obstacles and work independently.
Key Responsibilities
Circuit Layout Design: Create, modify, and optimize layouts for analog integrated circuits, ensuring proper arrangement of components and routing of electrical connections.
Design Rule Checking: Perform design rule checks (DRC and LVS) to ensure compliance with fabrication specifications and standards.
Collaboration: Work closely with circuit design engineers to understand circuit functionality and requirements and incorporate feedback into layouts.
Tool Proficiency: Use CAD tools (e.g., Cadence Virtuoso) for layout design and verification.
Required technical and professional expertise
Associate of Applied Science (AAS) or Industry related certification.
Hands‑on experience in analog IC layout design and physical verification.
Familiarity of semiconductor ground rules, layout techniques, and their application.
Familiarity with layout software and simulation tools for analysis, such as Cadence Virtuoso.
Attention to detail and the ability to work independently.
Strong problem‑solving skills and the ability to work under tight deadlines.
Good communication skills for effective collaboration with team members.
Preferred technical and professional experience
Coding or programming skills.
IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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Your role and responsibilities A Mask Layout Designer specializes in the layout of analog circuits, focusing on the arrangement of components within 14nm integrated circuits (ICs). Their role is critical in ensuring that the design functions correctly and meets performance specifications. Responsibilities include owning the circuit layout and collaborating with manufacturing, testing, and various engineering disciplines. The job requires a resourceful problem solver who can overcome technical obstacles and work independently.
Key Responsibilities
Circuit Layout Design: Create, modify, and optimize layouts for analog integrated circuits, ensuring proper arrangement of components and routing of electrical connections.
Design Rule Checking: Perform design rule checks (DRC and LVS) to ensure compliance with fabrication specifications and standards.
Collaboration: Work closely with circuit design engineers to understand circuit functionality and requirements and incorporate feedback into layouts.
Tool Proficiency: Use CAD tools (e.g., Cadence Virtuoso) for layout design and verification.
Required technical and professional expertise
Associate of Applied Science (AAS) or Industry related certification.
Hands‑on experience in analog IC layout design and physical verification.
Familiarity of semiconductor ground rules, layout techniques, and their application.
Familiarity with layout software and simulation tools for analysis, such as Cadence Virtuoso.
Attention to detail and the ability to work independently.
Strong problem‑solving skills and the ability to work under tight deadlines.
Good communication skills for effective collaboration with team members.
Preferred technical and professional experience
Coding or programming skills.
IBM is committed to creating a diverse environment and is proud to be an equal‑opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, gender, gender identity or expression, sexual orientation, national origin, caste, genetics, pregnancy, disability, neurodivergence, age, veteran status, or other characteristics. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
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