Director of RTL & IP/VIP Engineering

A global technology leader in Electronic Design Automation is seeking an experienced candidate for a role in Austin. This position requires over 15 years of expertise in RTL design and strong knowledge of SystemVerilog and UVM. The candidate will work alongside field engineers and customers to tackle deployment challenges and contribute to the development of verification IPs for cutting-edge technologies. A competitive salary and comprehensive benefits package are offered, reflecting the company's commitment to supporting its employees. #J-18808-Ljbffr