Senior Analog Layout Engineer – RF/SerDes & FinFET

A global technology leader in California is seeking an experienced Analog Layout Designer. The role requires a minimum of 8 years of hands-on experience in Analog or RF layout and knowledge of layout for analog modules. Candidates should be familiar with Cadence tools and TSMC processes, demonstrating strong debugging skills and a good understanding of analog layout concepts. This position offers a competitive salary and a comprehensive benefits package.
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