Networking Signal Integrity Engineering Director
Hewlett Packard Enterprise Company, Sunnyvale, CA, United States
Networking Signal Integrity Engineering Director
This role is onsite, with expectation to work primarily from an HPE office.
Job Description The Signal Integrity Engineering Director is a Technical Director that manages a team of SI engineers to implement PAM4 SerDes and develop signal integrity rules for hardware networking systems. They work with teams from HW, SW, PCB layout, and manufacturing test, playing a high‑impact role in developing new products. The role requires strong technical proficiency with PAM4 SerDes and signal‑integrity design.
Key Responsibilities
Lead a team of Signal Integrity engineers working on multiple new programs to implement PAM4 SerDes and develop signal‑integrity rules for hardware network systems.
Collaborate constructively with other functions (HW, SW, PCB layout, etc.) to develop new products.
Respond to and resolve field escalations and emergency customer escalations.
Coordinate with SI management across geography (US/India).
Deliver high‑quality SI deliverables on time for new products.
Requirements
5+ years of experience managing signal‑integrity engineers.
Strong knowledge of PAM4 SerDes and signal‑integrity, clocking, phase‑lock loops.
Experience with SI CAD tools: HFSS, SiWave, Keysight ADS.
Experience with SI lab equipment: DCAX sampling scope, UXR real‑time scope, VNA, TDR, signal‑source analyzer for phase‑noise measurements.
B.S. Electrical Engineering minimum; M.S. Electrical Engineering preferred.
Knowledge and Skills
Good people skills, ability to motivate, strong communicator, energetic, self‑starter, positive.
Team player who can work across geography with SI Director in India and Senior Director in USA.
Knowledge of SI CAD tools: Ansys HFSS, Cadence Allegro, Keysight ADS, Allegro Constraint Manager.
Salary Annual salary USD 183,000 – 389,500 in California. Variable incentives may also be offered.
Equal Employment Opportunity HPE is an Equal Employment Opportunity/Veteran/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are based on qualifications, merit, and business need. HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider qualified applicants with criminal histories. Hewlett Packard Enterprise is an EEO Protected Veteran/Individual with Disabilities.
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Job Description The Signal Integrity Engineering Director is a Technical Director that manages a team of SI engineers to implement PAM4 SerDes and develop signal integrity rules for hardware networking systems. They work with teams from HW, SW, PCB layout, and manufacturing test, playing a high‑impact role in developing new products. The role requires strong technical proficiency with PAM4 SerDes and signal‑integrity design.
Key Responsibilities
Lead a team of Signal Integrity engineers working on multiple new programs to implement PAM4 SerDes and develop signal‑integrity rules for hardware network systems.
Collaborate constructively with other functions (HW, SW, PCB layout, etc.) to develop new products.
Respond to and resolve field escalations and emergency customer escalations.
Coordinate with SI management across geography (US/India).
Deliver high‑quality SI deliverables on time for new products.
Requirements
5+ years of experience managing signal‑integrity engineers.
Strong knowledge of PAM4 SerDes and signal‑integrity, clocking, phase‑lock loops.
Experience with SI CAD tools: HFSS, SiWave, Keysight ADS.
Experience with SI lab equipment: DCAX sampling scope, UXR real‑time scope, VNA, TDR, signal‑source analyzer for phase‑noise measurements.
B.S. Electrical Engineering minimum; M.S. Electrical Engineering preferred.
Knowledge and Skills
Good people skills, ability to motivate, strong communicator, energetic, self‑starter, positive.
Team player who can work across geography with SI Director in India and Senior Director in USA.
Knowledge of SI CAD tools: Ansys HFSS, Cadence Allegro, Keysight ADS, Allegro Constraint Manager.
Salary Annual salary USD 183,000 – 389,500 in California. Variable incentives may also be offered.
Equal Employment Opportunity HPE is an Equal Employment Opportunity/Veteran/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are based on qualifications, merit, and business need. HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider qualified applicants with criminal histories. Hewlett Packard Enterprise is an EEO Protected Veteran/Individual with Disabilities.
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