Senior PCB Layout Engineer - High-Speed with Cadence Allegro

A leading technology firm in San Jose is seeking a Mid-Senior level PCB Designer to handle complex high-speed PCB layout design. The role involves working with external contractors and ensuring compliance with layout constraints. Qualified candidates will have over 10 years of hardware PCB experience, proficiency in Cadence Allegro, and knowledge of DFM, DFA, and DFT principles. This full-time position offers competitive compensation.
#J-18808-Ljbffr