
Senior Hardware Design Engineer – Low-Power Wearables
HP IQ, San Francisco, CA, United States
A leading AI innovation lab in San Francisco is seeking a Senior Hardware Design Engineer to support the design and development of low-power electronic devices. The ideal candidate will have strong circuit fundamentals, hands-on experience with schematic design, and a minimum of 5 years in electrical engineering. Responsibilities include defining power architecture for wearable devices, validating battery profiles, and working within a cross-functional team to ensure alignment towards power targets. Excellent benefits and a collaborative work culture are offered.
#J-18808-Ljbffr
#J-18808-Ljbffr