Senior Physical Design Verification Lead — CPU Tapeout Expert

A leading semiconductor company is seeking a highly experienced Physical Design Verification Lead in San Jose, California. The role involves ensuring the physical integrity of high-performance chip designs and requires expertise in Electronic Design Automation tools. Candidates should possess a Master’s degree and extensive experience in physical implementation and verification roles, especially with TSMC technology nodes. This position offers a competitive salary and the opportunity to work on cutting-edge technology that powers the next generation of semiconductor innovations.
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