DFT Design Engineer: SoC Testability & ATPG

A leading semiconductor company is seeking a Design-for-Testability Engineer in Boxborough, MA. This role involves managing the full DFT lifecycle, collaborating with various engineering teams to implement efficient test solutions. The ideal candidate will have a strong understanding of design for test methodologies, excellent communication skills, and a degree in Computer or Electrical Engineering. Join a culture of innovation, pushing the limits of technology while ensuring quality and efficiency in semiconductor designs.
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