Senior SRAM Compiler & ASIC IP Design Engineer

A leading technology company in Santa Clara is seeking an experienced Compiler Circuit Design Engineer to contribute to innovative ASIC design. In this role, you will drive the development of SRAM and register files, collaborate with compiler vendors, and integrate new ideas into the design process. The ideal candidate will have a BS degree and at least 10 years of experience in circuit design. Competitive benefits include stock options, comprehensive medical coverage, and educational reimbursement.
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