Senior ASIC/SoC Design Verification Architect

A leading technology firm is seeking a Design Verification Engineer IV for their San Jose, California location. Responsibilities include architecting the Verification Environment for ASIC SoC, developing complex self-checking test benches using C/C++, and maintaining an integrated verification flow. Candidates should have a minimum of 8 years of relevant experience and a deep understanding of ASIC verification processes. This full-time role offers competitive compensation and benefits.
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