Analog Design Engineer | Irvine, CA
Celero Communications, Inc., San Jose, CA, United States
Job Overview
Are you an Analog Design Engineer who is seeking an amazing opportunity delivering disruptive high speed interconnect technology powering next generation AI? We are looking for an Analog Design Engineer – someone who is excited to join a fast-growing start‑up company, responsible for handling high‑speed mixed‑signal circuit designs!
Preferred Location – On‑Site at our Irvine, CA HQ
Candidate will have the opportunity to architect and design circuits for high‑performance transceivers and other critical analog functions.
What You Will Do
High speed analog circuit design, such as high‑speed broadband amplifiers (VGA, CTLE, DRV, etc.).
Clock generation and distribution (VCOs, PLL, clock distribution, etc.).
Fundamental analog blocks (bandgap references, LDOs, temperature sensors, etc.).
New techniques for the development of next‑generation optical transceiver.
Design of custom passive components, from concept to silicon implementation.
Supervise analog layouts within advanced process nodes.
System verification and circuit design spec creation.
Silicon bring‑up, debug, and support.
Team communication and documentation.
What You Will Bring
Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience.
Strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post‑layout extraction tools) is a must.
Experience in advanced CMOS design and verification flows (tools to evaluate self‑heating, electromigration, safe operating area).
Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus.
Knowledge of the fundamentals of electromagnetism, lumped models and high‑frequency design.
Good understanding of analog layouts in FinFET and its effect on high‑speed designs is a plus.
Strong communication and documentation skills.
Salary Range for US
$150,000 - $250,000 Base Annually. The final offer will be determined based on job‑related skills, experience, qualifications, and location.
Equal Employment Opportunity
As set forth in Celero Communications, Inc.’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.
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Are you an Analog Design Engineer who is seeking an amazing opportunity delivering disruptive high speed interconnect technology powering next generation AI? We are looking for an Analog Design Engineer – someone who is excited to join a fast-growing start‑up company, responsible for handling high‑speed mixed‑signal circuit designs!
Preferred Location – On‑Site at our Irvine, CA HQ
Candidate will have the opportunity to architect and design circuits for high‑performance transceivers and other critical analog functions.
What You Will Do
High speed analog circuit design, such as high‑speed broadband amplifiers (VGA, CTLE, DRV, etc.).
Clock generation and distribution (VCOs, PLL, clock distribution, etc.).
Fundamental analog blocks (bandgap references, LDOs, temperature sensors, etc.).
New techniques for the development of next‑generation optical transceiver.
Design of custom passive components, from concept to silicon implementation.
Supervise analog layouts within advanced process nodes.
System verification and circuit design spec creation.
Silicon bring‑up, debug, and support.
Team communication and documentation.
What You Will Bring
Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience.
Strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks.
Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post‑layout extraction tools) is a must.
Experience in advanced CMOS design and verification flows (tools to evaluate self‑heating, electromigration, safe operating area).
Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus.
Knowledge of the fundamentals of electromagnetism, lumped models and high‑frequency design.
Good understanding of analog layouts in FinFET and its effect on high‑speed designs is a plus.
Strong communication and documentation skills.
Salary Range for US
$150,000 - $250,000 Base Annually. The final offer will be determined based on job‑related skills, experience, qualifications, and location.
Equal Employment Opportunity
As set forth in Celero Communications, Inc.’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.
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