SoC Physical Design Methodology Engineer
Apple Inc., San Jose, CA, United States
SoC Physical Design Methodology Engineer
Description
As a Physical Design Methodology engineer you will be an active participant in the team responsible for ensuring our physical design methodology is efficient, robust, and reliable. You will create and implement methodologies that improve the robustness, power, performance, and area (PPA) of our on-chip interconnects. You will perform electrical analysis to understand how physical effects impact the performance of our designs. You will develop construction methodologies to help mitigate any PPA degradation found in silicon. You will help ensure our modeling of silicon is efficient and accurate by running our signoff flows and comparing results to measurements from silicon we create. You will collaborate with the standard cell team to identify new cells to improve PPA, yield, or engineering productivity. You will be working with CAD and design teams to drive these improvements and updates in our production design flows in an effective and timely manner. You will verify theories by creating a strategy to verify them in silicon. You will apply the latest advances in data science and machine learning when needed in crafting these methodologies.
Minimum Qualifications
Bachelor’s degree in Electrical Engineering, Computer Science, or related field with 10+ years of relevant industry experience.
Preferred Qualifications
Have a strong intellectual curiosity, with excellent communication skills.
Organized, a self-starter, and adaptable to any challenge that comes up.
At least 5 years of physical design experience on SoC designs.
Have experience in working with advanced technology nodes.
Deeply knowledgeable about interconnects, parasitic extraction, performance analysis, and how manufacturing effects make these non-ideal. Have an extensive knowledge of power delivery and how power‑supply noise impacts chip performance.
Understand inductance effects and have circuit design experience. Are very comfortable running and modifying Spice simulations.
Familiar with static timing analysis tools and methodologies. Being able to explain silicon behaviors should be an exciting challenge.
Have a proven understanding of scripting languages such as Python and Tcl.
Experience with flow development for a large number of users on a tight schedule is a plus.
Compensation and Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage.
Retirement benefits.
A range of discounted products and free services.
For formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
Possibility of discretionary bonuses or commission payments as well as relocation.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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Description
As a Physical Design Methodology engineer you will be an active participant in the team responsible for ensuring our physical design methodology is efficient, robust, and reliable. You will create and implement methodologies that improve the robustness, power, performance, and area (PPA) of our on-chip interconnects. You will perform electrical analysis to understand how physical effects impact the performance of our designs. You will develop construction methodologies to help mitigate any PPA degradation found in silicon. You will help ensure our modeling of silicon is efficient and accurate by running our signoff flows and comparing results to measurements from silicon we create. You will collaborate with the standard cell team to identify new cells to improve PPA, yield, or engineering productivity. You will be working with CAD and design teams to drive these improvements and updates in our production design flows in an effective and timely manner. You will verify theories by creating a strategy to verify them in silicon. You will apply the latest advances in data science and machine learning when needed in crafting these methodologies.
Minimum Qualifications
Bachelor’s degree in Electrical Engineering, Computer Science, or related field with 10+ years of relevant industry experience.
Preferred Qualifications
Have a strong intellectual curiosity, with excellent communication skills.
Organized, a self-starter, and adaptable to any challenge that comes up.
At least 5 years of physical design experience on SoC designs.
Have experience in working with advanced technology nodes.
Deeply knowledgeable about interconnects, parasitic extraction, performance analysis, and how manufacturing effects make these non-ideal. Have an extensive knowledge of power delivery and how power‑supply noise impacts chip performance.
Understand inductance effects and have circuit design experience. Are very comfortable running and modifying Spice simulations.
Familiar with static timing analysis tools and methodologies. Being able to explain silicon behaviors should be an exciting challenge.
Have a proven understanding of scripting languages such as Python and Tcl.
Experience with flow development for a large number of users on a tight schedule is a plus.
Compensation and Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including:
Comprehensive medical and dental coverage.
Retirement benefits.
A range of discounted products and free services.
For formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
Possibility of discretionary bonuses or commission payments as well as relocation.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Equal Opportunity
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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