Mixed-Signal IC Design Engineer
Avery Bio, San Diego, CA, United States
Avery is a trailblazer in developing transformative technologies to solve the world’s most pressing biological and industrial challenges. We are building the world’s first fully automated genetic engineering platform—an end-to-end system that integrates novel semiconductor-based chips to scale the synthesis, assembly, and testing of genetic components in both cell‑free and cellular environments. This unified platform bridges the digital and biological realms, enabling unprecedented speed and precision in bioengineering. Our mission is to revolutionize industries—from drug discovery and precision medicine to advanced materials and sustainable agriculture—by unlocking the full potential of programmable biology.
If you’re passionate about shaping the future of biotechnology and want to work at the cutting edge of science and engineering, we’d love to hear from you. Help us unlock and accelerate the engineering of life.
Mixed‑Signal IC Design Engineer
We are seeking a Mixed‑Signal Integrated Circuit (IC) Designer with demonstrated high‑voltage IC design experience to lead and develop integrated circuits operating in BCD and high‑voltage CMOS technologies (up to ~200 V).
This role focuses on designing robust analog and mixed‑signal circuits spanning large voltage domains where device physics, isolation, layout, and long‑term reliability are first‑order design constraints.
In collaboration with the electrochemistry and microfluidics teams, the successful candidate will contribute to circuit architecture, detailed design, and silicon validation for next‑generation biological synthesis systems requiring precise control and switching of high voltages.
Duties and Responsibilities
Work with a skilled multi‑disciplinary team to define system requirements
Architect and design circuits operating across LV and HV domains
Drive selection of optimum technology node for the application
Design analog and mixed‑signal circuits in HV/BCD processes such as high‑voltage drivers and interfaces, level shifters and domain isolation circuits, bias, reference, and sensing circuits and protection and reliability structures
Perform schematic design, simulation, and post‑layout verification
Collaborate closely with layout to implement HV‑safe structures
Evaluate device stress, SOA, and lifetime reliability
Identify and mitigate reliability and failure risks early in the design cycle
Support silicon bring‑up, characterization, and debugging
Other duties and responsibilities as required.
Qualifications and Education
Minimum of 5+ years of relevant experience, ideally within life sciences, synthetic biology, or biopharma.
PhD in Electrical Engineering or related discipline or MS with 5 years of experience or BS with 5 years of experience.
Direct experience designing and taking to production circuits in a high‑voltage IC technology (BCD, HV CMOS, SOI, or power IC process)
Understanding of energy delivery, charge transfer, and efficiency in switching or pulsed systems
Failure analysis participation
5+ years of HV IC design experience, or equivalent demonstrated expertise delivering high‑voltage silicon to production
Strong interpersonal and collaborative skills, with a willingness to contribute in cross‑disciplinary technical environments.
Proven ability to thrive in fast‑paced, start‑up environments, showing flexibility, initiative, and a growth‑oriented mindset.
Start salary at $125,000. Final salary will be based on experience, skills and qualifications.
Must Haves
Demonstrated understanding and practical experience with:
Design challenges associated with high‑voltage devices (typically >40 V; higher voltage is advantageous)
SOA, device stress and reliability considerations
High dV/dt switching effects and parasitic coupling
Feedback and loop stability
Designing efficient high‑voltage driver circuits for capacitive or electrochemical loads (kHz ~ MHz range)
Biasing and current reference design
Noise and mismatch analysis
PVT and Monte‑Carlo verification
Transistor‑level simulation and verification
Cadence Virtuoso (or equivalent), Spectre or comparable simulators
Post‑layout extraction and verification flows
Strong layout awareness and experience collaborating closely with layout on high‑voltage implementations
Understanding of ESD and protection strategies in high‑voltage ICs
Working Conditions
This position is based in our San Diego, CA office.
100% onsite role.
Prolonged periods of sitting at a desk and working on a computer and in a lab environment.
Ability to lift up to 20 pounds and perform repetitive tasks such as lifting, standing, pipetting, preparing samples preparation, and operating equipment for extended periods.
The candidate must be comfortable working in a laboratory environment.
The candidate may be exposed to hazardous materials in accordance with all safety protocols and regulatory guidelines.
Avery is an equal opportunity employer and values diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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If you’re passionate about shaping the future of biotechnology and want to work at the cutting edge of science and engineering, we’d love to hear from you. Help us unlock and accelerate the engineering of life.
Mixed‑Signal IC Design Engineer
We are seeking a Mixed‑Signal Integrated Circuit (IC) Designer with demonstrated high‑voltage IC design experience to lead and develop integrated circuits operating in BCD and high‑voltage CMOS technologies (up to ~200 V).
This role focuses on designing robust analog and mixed‑signal circuits spanning large voltage domains where device physics, isolation, layout, and long‑term reliability are first‑order design constraints.
In collaboration with the electrochemistry and microfluidics teams, the successful candidate will contribute to circuit architecture, detailed design, and silicon validation for next‑generation biological synthesis systems requiring precise control and switching of high voltages.
Duties and Responsibilities
Work with a skilled multi‑disciplinary team to define system requirements
Architect and design circuits operating across LV and HV domains
Drive selection of optimum technology node for the application
Design analog and mixed‑signal circuits in HV/BCD processes such as high‑voltage drivers and interfaces, level shifters and domain isolation circuits, bias, reference, and sensing circuits and protection and reliability structures
Perform schematic design, simulation, and post‑layout verification
Collaborate closely with layout to implement HV‑safe structures
Evaluate device stress, SOA, and lifetime reliability
Identify and mitigate reliability and failure risks early in the design cycle
Support silicon bring‑up, characterization, and debugging
Other duties and responsibilities as required.
Qualifications and Education
Minimum of 5+ years of relevant experience, ideally within life sciences, synthetic biology, or biopharma.
PhD in Electrical Engineering or related discipline or MS with 5 years of experience or BS with 5 years of experience.
Direct experience designing and taking to production circuits in a high‑voltage IC technology (BCD, HV CMOS, SOI, or power IC process)
Understanding of energy delivery, charge transfer, and efficiency in switching or pulsed systems
Failure analysis participation
5+ years of HV IC design experience, or equivalent demonstrated expertise delivering high‑voltage silicon to production
Strong interpersonal and collaborative skills, with a willingness to contribute in cross‑disciplinary technical environments.
Proven ability to thrive in fast‑paced, start‑up environments, showing flexibility, initiative, and a growth‑oriented mindset.
Start salary at $125,000. Final salary will be based on experience, skills and qualifications.
Must Haves
Demonstrated understanding and practical experience with:
Design challenges associated with high‑voltage devices (typically >40 V; higher voltage is advantageous)
SOA, device stress and reliability considerations
High dV/dt switching effects and parasitic coupling
Feedback and loop stability
Designing efficient high‑voltage driver circuits for capacitive or electrochemical loads (kHz ~ MHz range)
Biasing and current reference design
Noise and mismatch analysis
PVT and Monte‑Carlo verification
Transistor‑level simulation and verification
Cadence Virtuoso (or equivalent), Spectre or comparable simulators
Post‑layout extraction and verification flows
Strong layout awareness and experience collaborating closely with layout on high‑voltage implementations
Understanding of ESD and protection strategies in high‑voltage ICs
Working Conditions
This position is based in our San Diego, CA office.
100% onsite role.
Prolonged periods of sitting at a desk and working on a computer and in a lab environment.
Ability to lift up to 20 pounds and perform repetitive tasks such as lifting, standing, pipetting, preparing samples preparation, and operating equipment for extended periods.
The candidate must be comfortable working in a laboratory environment.
The candidate may be exposed to hazardous materials in accordance with all safety protocols and regulatory guidelines.
Avery is an equal opportunity employer and values diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
#J-18808-Ljbffr