SOC Design Verification Engineer – Test & Debug

A leading technology company in San Diego is seeking a Design Verification Engineer to ensure the quality of SOCs and contribute to chip design efforts. This role involves reviewing design specifications, developing test plans, and collaborating closely with design teams. A Bachelor's degree is required, with preferred knowledge in Verilog or digital design. The compensation range for this role is between $120,300 and $181,200, alongside a benefits package that offers medical coverage, stock options, and more.
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