Senior Design Verification Engineer (Memory & Logic)

A leading memory and storage solutions provider is seeking a Senior Design Layout Engineer to enhance product opportunities in Boise, Idaho. The successful candidate will contribute to the optimization of Memory and Analog circuits, manage layout processes, and verify designs using industry-standard tools. Ideal applicants should possess a Bachelor’s degree in Electrical Engineering and have strong expertise in layout design and cross-functional collaboration. This role promotes innovation and efficiency in product development.
#J-18808-Ljbffr