Sr. IC Design Engineer
Teledyne LeCroy, Village at Chestnut Ridge, DE, United States
The Senior IC Design Engineer will collaborate closely with other members of the IC design team. Often, multiple designers are working together on one chip. Whether or not designers are working together on the same project, shared technical exploration and learning are valued and expected of all members of the team. Since our custom ICs are used in the test and measurement products we develop, the Senior IC Design Engineer will also collaborate with the design and manufacturing teams that will use the custom ICs. When silicon comes back from the foundry, a separate test team will handle the bulk of the IC characterization, but the Senior IC Design Engineer will also participate in the characterization process. The Senior IC Design Engineer will work with test engineers to implement wafer test procedures and provide guidance on production issues as they arise. LeCroy is part of Teledyne which is a technology company made up of many smaller independently operated high-tech businesses. The Senior IC Design Engineer will work as part of the LeCroy IC design team, but with the benefit and resources of the larger IC design community within Teledyne.
The custom ICs that the Senior IC design engineer will work on, often include a mix of the following characteristics:
Wideband operation from DC up to mm-wave frequencies
Signal conditioning (amplification and filtering)
Optimization of noise and distortion
Analog signal distribution (splitter, mux, driver, receiver)
High speed sampling (track and hold / sample and hold / interleaving)
Temperature stability
Power consumption constraints
ESD protection
Design for manufacturability and reliability
The Senior IC Design Engineer will primarily use Cadence tools (Virtuoso, AMS, SpectreRF, Explorer, Assembler, Quantus, EMX, Physical Verification System) to complete the design tasks. Skill and Python scripting are used in collaboration with these tools. In some designs, additional tools such as Ansys HFSS are used as well.
Qualifications: Six or more years of BiCMOS IC design experience with multiple tape outs, meaningful personal responsibility, and successful results. Recent PhD recipients with strong design and tape out experience are eligible to apply as well
BS, MS or PhD in Electrical Engineering
Thorough understanding of fundamental circuit design concepts such as passive network analysis, bipolar devices, CMOS devices, time and frequency domain analysis, feedback, stability, transmission lines, noise, distortion, compression, temperature sensitivity and sampling theory
Thorough understanding of real-world circuit design considerations such as bipolar and CMOS device structure and limitations, thermal sensitivity, parasitics, electromigration, breakdown, ESD susceptibility and reliability
Understanding of RF design topics such as S-Parameters and matching networks
Proficiency with the tools we use or comparable tools (Virtuoso, AMS, SpectreRF, Explorer, Assembler, Quantus, EMX, Physical Verification System, Skill, Python, HFSS)
Experience designing wideband circuits from DC to mm-wave frequencies
Enthusiasm for sharing knowledge and mentoring junior team-members
Excellent collaboration and communication skills
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The custom ICs that the Senior IC design engineer will work on, often include a mix of the following characteristics:
Wideband operation from DC up to mm-wave frequencies
Signal conditioning (amplification and filtering)
Optimization of noise and distortion
Analog signal distribution (splitter, mux, driver, receiver)
High speed sampling (track and hold / sample and hold / interleaving)
Temperature stability
Power consumption constraints
ESD protection
Design for manufacturability and reliability
The Senior IC Design Engineer will primarily use Cadence tools (Virtuoso, AMS, SpectreRF, Explorer, Assembler, Quantus, EMX, Physical Verification System) to complete the design tasks. Skill and Python scripting are used in collaboration with these tools. In some designs, additional tools such as Ansys HFSS are used as well.
Qualifications: Six or more years of BiCMOS IC design experience with multiple tape outs, meaningful personal responsibility, and successful results. Recent PhD recipients with strong design and tape out experience are eligible to apply as well
BS, MS or PhD in Electrical Engineering
Thorough understanding of fundamental circuit design concepts such as passive network analysis, bipolar devices, CMOS devices, time and frequency domain analysis, feedback, stability, transmission lines, noise, distortion, compression, temperature sensitivity and sampling theory
Thorough understanding of real-world circuit design considerations such as bipolar and CMOS device structure and limitations, thermal sensitivity, parasitics, electromigration, breakdown, ESD susceptibility and reliability
Understanding of RF design topics such as S-Parameters and matching networks
Proficiency with the tools we use or comparable tools (Virtuoso, AMS, SpectreRF, Explorer, Assembler, Quantus, EMX, Physical Verification System, Skill, Python, HFSS)
Experience designing wideband circuits from DC to mm-wave frequencies
Enthusiasm for sharing knowledge and mentoring junior team-members
Excellent collaboration and communication skills
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