R&D IC Design Engineer
Broadcom, Irvine, CA, United States
Job Description
This opening is for working on chips that enable Physical Layer Products for High Speed Optical Communication.
Architect block‑level design specifications from marketing or system requirements.
Prepare detailed design documents and timing constraint files.
RTL coding, lint checks, CDC, synthesis, equivalency checking, STA, and RTL/gate‑level simulations & silicon debug.
Scripting for various IC design tasks such as STA, equivalency checks, testbench, simulations, synthesis, etc.
Prepare block‑level resource requirements & development schedule.
Generate verification & test plans for design validation.
Perform design trade‑off analysis – leakage, dynamic power, die size, schedule, resources, priority, etc.
Silicon bring‑up and validation, ATE program bring‑up.
Job Requirements
B.S. degree in EE or Computer Engineering, with a minimum of 8 years of direct related work experience.
M.S. degree or Ph.D. in EE or Computer Engineering, with 6 years of related experience.
Good knowledge of ARM subsystem.
Good knowledge of high‑speed digital circuit design.
Good knowledge of digital upsampling/downsampling.
Good knowledge of 10G/100G/200G/400G/800G Ethernet and OTN network.
Good knowledge of FEC (Forward Error Correction) design.
Good knowledge of digital signal processing and error‑correction coding (a plus).
Strong analytical and problem‑solving skills with hands‑on laboratory debugging experience.
Good knowledge of RTL simulation and synthesis.
In‑depth knowledge of design for low power, design for test, and design for manufacturing.
Good knowledge of languages relevant to the ASIC development process – Verilog, VHDL, Unix/Perl scripting or Python, and C.
Self‑motivated, with excellent communication skills and the ability to excel in a team environment.
Good organizational skills, capable of following through and bringing issues to closure.
Understanding of the entire IC development flow & procedure, including silicon volume production qualification requirements and procedures.
Enthusiastic, enjoys IC development work.
Able to work with teams at remote locations across different time zones.
Compensation and Benefits
The annual base salary range for this position is $141,300 - $226,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company‑paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Job ID: R024630
#J-18808-Ljbffr
This opening is for working on chips that enable Physical Layer Products for High Speed Optical Communication.
Architect block‑level design specifications from marketing or system requirements.
Prepare detailed design documents and timing constraint files.
RTL coding, lint checks, CDC, synthesis, equivalency checking, STA, and RTL/gate‑level simulations & silicon debug.
Scripting for various IC design tasks such as STA, equivalency checks, testbench, simulations, synthesis, etc.
Prepare block‑level resource requirements & development schedule.
Generate verification & test plans for design validation.
Perform design trade‑off analysis – leakage, dynamic power, die size, schedule, resources, priority, etc.
Silicon bring‑up and validation, ATE program bring‑up.
Job Requirements
B.S. degree in EE or Computer Engineering, with a minimum of 8 years of direct related work experience.
M.S. degree or Ph.D. in EE or Computer Engineering, with 6 years of related experience.
Good knowledge of ARM subsystem.
Good knowledge of high‑speed digital circuit design.
Good knowledge of digital upsampling/downsampling.
Good knowledge of 10G/100G/200G/400G/800G Ethernet and OTN network.
Good knowledge of FEC (Forward Error Correction) design.
Good knowledge of digital signal processing and error‑correction coding (a plus).
Strong analytical and problem‑solving skills with hands‑on laboratory debugging experience.
Good knowledge of RTL simulation and synthesis.
In‑depth knowledge of design for low power, design for test, and design for manufacturing.
Good knowledge of languages relevant to the ASIC development process – Verilog, VHDL, Unix/Perl scripting or Python, and C.
Self‑motivated, with excellent communication skills and the ability to excel in a team environment.
Good organizational skills, capable of following through and bringing issues to closure.
Understanding of the entire IC development flow & procedure, including silicon volume production qualification requirements and procedures.
Enthusiastic, enjoys IC development work.
Able to work with teams at remote locations across different time zones.
Compensation and Benefits
The annual base salary range for this position is $141,300 - $226,000. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company‑paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Job ID: R024630
#J-18808-Ljbffr