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Sr. Member Technical Staff - DEG DRAM Design

Micron Technology, Folsom, CA, United States


Responsibilities
Collaborate with the architecture team and external customers on new product specifications. Explore new system‑level solutions for future HBM products and make recommendations after performing highly technical feasibility analyses. Drive interface logic chip and memory architecture solutions. Develop circuit designs for memory array, input buffer, output buffer, control logic, address decode, datapath, and internal test logic. Provide expert knowledge to advance innovative technical solutions and advise senior management on significant technical issues. Coordinate and lead the layout process, including placement and routing optimization. Contribute to cross‑group communication to work toward standardization and group success.

Qualifications

Employer will accept a Bachelor’s degree in Electrical Engineering, Electronic Engineering, Mechatronics Engineering, or a related field followed by 15 years of progressive, post‑baccalaureate experience.

Memory design experience.

High‑speed clocking and interface development.

RTL to GDS design (code synthesizable RTL, code TCL constraints, Design Compiler, PrimeTime, LEC, and UPF).

Custom circuit design (Virtuoso schematic and SPICE simulations).

Design for test (scan insertion, JTAG, P1500, and BIST).

Salary
US base salary range: $266,617.47 – $334,000 per year.

Benefits
Micron offers medical, dental, and vision plans. Additional benefits include paid family leave, paid time off, and paid holidays.

EEO Statement
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.

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