
Lead Power & Board Design Engineer for ASICs
Astera Labs, San Jose, CA, United States
A global leader in connectivity solutions is seeking a Principal Power and Board Design Engineer in San Jose, CA. This role involves designing and optimizing power systems for ASIC products, ensuring robust power integrity. Candidates should have 8-10 years of experience in power and board design engineering, and be proficient in Cadence OrCAD and Allegro. The position offers a competitive salary range of $209,000 - $230,000.
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