Staff Analog Design Engineer — Hybrid, PLL/CMOS Focus

A global semiconductor company is searching for a Staff Analog Design Engineer to design analog circuits for high-performance timing products. The role involves collaborating with cross-functional teams, debugging prototypes, and supporting validation processes. Candidates should have a Master's or PhD in Electrical Engineering and over 10 years of relevant experience in IC design. This position offers a hybrid work model and competitive compensation ranging from $117,000 to $146,500 annually.
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