DDR Design Engineer: RTL, Timing & Silicon Bring-Up

Apple Inc. is seeking a results-oriented DDR Design Engineer in Beaverton, Oregon. This role involves engaging in all design phases from concept to silicon characterization while working closely with architecture and verification engineers. Candidates should possess a B.S. in Electrical Engineering and expertise in RTL design using Verilog or SystemVerilog. Familiarity with DDR PHY design is preferred, enhancing collaboration in crafting innovative products that delight millions of users daily.
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