FPGA Systems Design Intern: High-Speed JESD204C Prototyping

A leading technology firm is seeking an Intern - Systems Design Engineer to work on an FPGA-based prototype for high-speed communication. The role involves studying the JESD204C protocol, designing FPGA systems, and developing verification logic. Candidates should have a Bachelor or Master’s degree in electronic or computer engineering and basic experience with VHDL or Verilog. The position is located in Boise, Idaho, and offers a dynamic, hands-on learning experience.
#J-18808-Ljbffr