Electrical Link Architect for High-Speed SerDes & Optics

Ayar Labs is seeking a Senior Staff Engineer in San Jose, CA, to own electrical modeling for silicon photonics I/O platforms. You will design and analyze high-speed links, contributing significant expertise in analog front-end design and DSP. This role requires a Master’s degree and substantial experience in modeling for wireline communication. Join us to explore next-generation architectures and help shape the future of AI compute solutions. Salary range: $190,000 - $223,000.
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